Programmable logic devices (PLDs) are a well-known type of IC that can be programmed to perform specified logic functions. One type of PLD, the field programmable gate array (FPGA), typically includes an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth.
Each programmable tile typically includes both programmable interconnect and programmable logic. The programmable interconnect typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.
Generally, circuit designs for PLDs are implemented through a process referred to as an implementation flow that is performed by one or more computer-based electronic design automation (EDA) tools. An implementation flow entails the various processes that are applied to a programmatic representation of a circuit design, e.g., a hardware description language (HDL) description of a circuit, a netlist, or the like, in order to implement that circuit design within a specific target PLD. For example, an implementation flow typically includes processes such as synthesis, mapping, placing, and routing.
The resulting circuit design can be converted to a stream of configuration data. Generally, the programmable interconnect and programmable logic of a PLD are programmed by loading the stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.
Other types of PLDs can include Complex Programmable Logic Devices (CPLDs), Programmable Logic Arrays (PLAs), Programmable Array Logic (PAL) devices, or the like. For all of these PLDs, the functionality of the device is controlled by data bits provided to the device for that purpose. The data bits can be stored in volatile memory (e.g., static memory cells, as in FPGAs and some CPLDs), in non-volatile memory (e.g., FLASH memory, as in some CPLDs), or in any other type of memory cell.
Still other PLDs are programmed by applying a processing layer, such as a metal layer, that programmably interconnects the various elements on the device. These PLDs are known as mask programmable devices. PLDs can also be implemented in other ways, e.g., using fuse or antifuse technology. The terms “PLD” and “programmable logic device” can include but, are not limited to, these exemplary devices, and further can encompass devices that are only partially programmable. For example, one type of PLD includes a combination of hard-coded transistor logic and a programmable switch fabric that programmably interconnects the hard-coded transistor logic.
In some cases, it becomes necessary to modify a circuit design in order to achieve a design goal. Typically design goals are specified in terms of constraints to which the circuit, or some portion of the circuit, must conform. Constraints can be specified in terms of timing, power consumption, area consumption, or the like. When a circuit design does not meet one or more established constraints, it becomes necessary to modify the circuit design in some way during the implementation flow in order to achieve stated design goals.